The present embodiment relates to an image processing device including functional macros for processing image data for frames and to a method for processing images.
In a digital camera, an imaging sensor, such as a CCD image sensor and the like, detects light and generates an electrical signal that is in accordance with the detected light. Then, an analog-to-digital (A/D) converter converts the electrical signal to a digital signal. Image data for a frame is generated from image data for a plurality of pixels, which form a picture. A preprocessor of an image data processor, which includes an LSI and the like, processes the image data in a predetermined mode and outputs image data in RGB format (Bayer data). A color space converter then converts the RGB image data into image data in YCbCr format.
The image data processor includes functional macros that sequentially perform resolution conversion and a Joint Photographic Experts Group (JPEG) process on the processed image data. The image data processed by and output from each functional macro are temporarily stored in a storage circuit formed by, for example, a synchronous DRAM (SDRAM).
A plurality of data lines forming a single frame are grouped in accordance with a predetermined mode to generate a plurality of blocks. Each functional macro performs image processing on each block. For example, each functional macro performs image processing by reading image data of an image processing target, that is, image data of an original frame, for each block from the storage circuit. The functional macro then rewrites the image data for each block that has undergone image processing to the storage circuit. After one functional macro rewrites the processed image data to the storage circuit, another functional macro starts the next image processing. In the prior art, the processing time for one frame is shortened by dividing the frame into blocks and performing image processing in parallel on parts of the frame with the plurality of functional macros.
The output timing of functional macros 0 and 1 will now be described with reference to the timing chart of FIG. 1. In the example of FIG. 1, frame 0 and frame 1 are each divided into a plurality of blocks, such as four blocks. The functional macro 0 reads the image data of each block, executes first image processing on each block, and outputs the processed block. Each block of the image data processed and output from the functional macro 0 is rewritten to the storage circuit.
The functional macro 1 monitors the number of data lines processed by the functional macro 0, reads the image data of each block rewritten to the storage circuit by the functional macro 0, executes the next image processing, and re-writes the block that has undergone image processing to the storage circuit. The image data of the frame rewritten to the storage circuit is ultimately stored in a portable memory card, such as a Compact Flash (registered trademark), or an SD memory card (registered trademark), via an interface circuit in the image data processor.